From: Joerg Hansmann (jhansmann_at_g...)
Date: 2000-10-17 21:56:21
Hi,
----- Original Message -----
From: <yaniv_vi_at_yahoo.com>
To: <BrainWaves_at_egroups.com>
Sent: Saturday, October 14, 2000 3:22 AM
Subject: [BW] Re: building cheap eeg
> i wrote my opnion on the issues .
> by the way , would you send me a BOM with prices for each component ?
> and for each section what the price is ?
> i think it's the best way to optimize price .
You should have got it now per email.
> > > here's a good article of the h.w. design of eeg amplifier :
> > > http://www.biosemi.com/publications/artikel4.htm
>
> the site holds more articles on this subject ( 8 articles).
> just change to artikle1 / artikle2 ... the web address
:-)
Very good.
http://www.biosemi.com/publications/artikel3.htm covers the potential-divider-effect
in chap 3.1 "Influence of common mode voltage" .
> > If you use high-passes with resistors of 10 megs parallel to each
> input
> > of the op amp you will degrade cmmr from 115db (for ina114 at G=10)
> > to 80 db . That is a loss of 35 dB.
> > If you let the inputs as they are (10^10 Ohms) the same imbalance
> would
> > lead to a cmmr of 140db. Here the limiting factor is the 115db from
> the
> > ina114.
> >
>
> theoreticly youre right , but that's what is done in brainmaster -
> an eeg device that sells for $950 .(i don't know if it's good or bad).
I have seen a raw schematic of the brainmaster with high-passes at the inputs,
but if I remember right, there were no components values shown.
> what's the common mode noise sources ?
Its 50Hz line noise coupled into the body of the test subject by small stray capacitors (Cpow, Cbody)
(see added picture "EEG input stage 02.gif. I have tried to use a schematic similar to
http://www.biosemi.com/publications/artikel3.htm Fig. 1)
> what are there frequency response ?
50Hz, but I have set up a simulation from 0.1Hz to 10kHz (see picture)
It can be seen, that with Rcomm=10k the line noise will have an unacceptble high value of 21µV at 50Hz.
Without right-leg-driver circuit the shown schematic will not work very well.
> > The diodes are mandatory for ESD protection.
>
> even thought - can you check if they insert much noise ?
>
I will check it, when I have the software (and the prototype back from the friend, who writes the software).
> about noise preformance
> 1.the most noise for my opnion is in the 0.1hz -10 hz band
ACK.
> 2.about your noise - you should simply first detemine the noise
> source : is it diodes / amplifier / somthing else .
> and after is the time to look for solution .
> but first see if your within the article spec .
> there's no need for overdesign .
For the moment I am pursuing your idea with blocking DC with am input high pass
and setting the gain of the input amplifier to 1000 or 10000.
This would reduce some noise and one following amplifier stage.
About RS232 and irda later...
bye,
Joerg
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