From: Joerg Hansmann (info_at_jhansmann.de)
Date: 2001-05-18 17:56:19
Hi,
----- Original Message -----
From: <jiva_at_humboldt1.com>
To: <buildcheapeeg_at_yahoogroups.com>
Sent: Friday, May 18, 2001 5:06 PM
Subject: [buildcheapeeg] Re: Sound Card-Summary
> --- In buildcheapeeg_at_yahoogroups.com, "Joerg Hansmann" <info_at_jhansmann.de> wrote:
>
> > Decoding the signal in software could be done with two PLL algorithm
> > instances ("VCO"-oscillator, phase-detector, servo circuit with
> > low-pass).
> >
>
> I don't understand this process ...
>and then another module would
> convert to the digital sampling expected by Rob's (et al)
> software?
Let us assume the soundcard samples the added output of 2 VCOs from the eeg
amplifier at 44kHz mono (one channel used) and we want to get an output
of 2 AD-Values at a sample rate of 256Hz to feed it into Rob's software.
In this case we would get a chunk of 172 (16bit)-values from the soundcard every
1/256 seconds. The 172 input values contain 2 added sine-waves that represent
the 2 eeg-chanel data in form of the deviation of a center-frequency of each (hardware)
VCO.
A rather crude and inefficient method for decoding the 2 sine-waves would be
to extrapolate the 172 values to the next potency of 2, (that would be 256).
Then a FFT could be performed on the data and the result would be 128
complex coefficients. After calculating the abs()-value 2 maximum values should
show up, that represent the 2 VCO-Frequencies. With knowledge of the
2 center-frequencies and the df/dU of the VCO circuits the original eeg-channel
voltages can be calculated. However I assume that the accuracy of this method
would not deliver more than 7 Bits.
A better method would be to simulate 2 PLLs in software to decode the
two FM-signals (in fact the output of a VCO is a FM-modulated signal).
A PLL (pase locked loop) is a servo circuit that locks on the nearest
input frequency and keeps track of it by generating a control voltage
for an internal VCO. The control voltage is changed by the servo circuit until the
frequency or phase-difference compared to the input signal is zero.
The control voltage of the VCO (in the PLL) is proportional to the
original-eeg-channel voltage that should be decoded.
HTH,
Regards
Joerg
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