Re: The input stage: almost done!

From: sleeper75se (sleeper75se_at_yahoo.se)
Date: 2002-01-22 11:53:43


--- In buildcheapeeg_at_yahoogroups.com, "Jim Meissner" <jpmeissner_at_mindspring.com> wrote:
> Dear Andreas:
>
> The gain of the input amplifier is about 100 therefore all the
> noise you are calculating should be referred to the input and
> divided by 100. The 20 uV would be the equivalent of 0.02 uV of
> input noise and therefore insignificant.

Hello Jim,

Yes, I know that, what I felt unsure about was if the noise
calculation was correct or not. But it probably is.

> Your main concern should be leakage current of the op amp and
> changes with temperature due to the high resistor values. I do not
> know the op amp. In the dark ages when I used the 709 and 741 it
> was important to put equal source impedance for both the inverting
> and noninverting inputs so that the bias currents would be
> cancelled. This may not be needed with this op amp, but I though
> you might like to know.

Ok. I've looked at the input leakage and temperature drift as you
suggested. There are some parameters here that are unfamiliar, but
I've tried to interpret them as best I can.

The datasheet says:

A = Input bias current: max +/- 550pA
B = Input offset current: max 420pA
C = Input offset voltage: max 130uV
D = Average input offset voltage drift: 0.75uV /degree Celsius
E = Input impedance (differential): min 15Mohms, typ 40Mohms

If R = 680Kohms then

worst case bias is 2 * A * R = 748uV and
worst case voltage drop caused by the offset current is B * R = 286uV

The resulting offset is consequently about 1mV per stage.

I am unsure how to relate offset voltage to offset current so that I
can calculate the temperature drift.

I'm improvising a bit here:

Offset voltage / offset current = C / B = 130uV / 420pA =
309523 "ohms"
Offset current drift is then D / 309523 = 0.75uV / 309523 = 2.4pA or
a voltage change of 2.4pA * R = 1.6uV / degree celsius caused by the
large resistor.

Looking at E, you can see that the input impedance is rather low
compared to R. I estimate the voltage drop to be 4% per stage at
15Mohms, so in total, the signal coming out of the last stage is only
0.96^3 = 0.875 of the input. I hope that's not a problem, because
this can be compensated for by raising the gain from 2500 to 2900.

Are there any glaring mistakes that you can see here?

> evaporating (sputtering) a thin conductive film onto the ceramic
> core. Then a spiral groove is cut through the conducting film to
> make a longer and larger value resistor. They are actually
> adjusted to value by this cutting wheel. This insulating groove
> may only be 0.001 inches wide and any high voltage applied to the
> resistor will jump and arc across.

Suddenly, it all makes sense. :-)

Digikey does not have carbon resistors, and I don't have to buy any,
but just for reference, I've selected a ceramic resistor (series OX).
It is specified for one-second pulses of up to 14kV with a drop in
resistance of less than 1%, so ESD should be easily handled by it.

http://www.ohmite.com/catalog/pdf/ox_oy_series.pdf

Do you know how the noise properties of this type of resistor compare
to a carbon type?

> No, you cannot substitute an electrolytic for a tantalum! Not all
> capacitors are created equal. Capacitors are as different as cars.
> Not all cars are the same. You could not "substitute" a VW for a
> Porsche in a race.
>
> I worked for a capacitor manufacturer for a few years so if you
> want to know more just ask. Each type of capacitor covers a
> different part of the frequency spectrum.

I'm always interested in learning more, so here are a few things I'm
wondering about:

* Why are not dry aluminium electrolytics not good enough?
* What is the major difference in performance between aluminium and
tantalum in regard to their use as decoupling caps?
* Would a substitute be possible for larger capacitors / lower
frequencies (i.e. 100uF) or is it even more critical that those are
tantalum?

A more general question is: What properties in a capacitor is
important here?

I can make a longer list of questions, about ESR and so on, but
perhaps that's sufficient for now. :-)

>
> If the A/D sampling frequency is 128 Hz, the cutoff should be much
> lower than 124 Hz. I see very little benefit of sampling faster.

Well, I designed the filter for 512Hz...
The main reason for choosing a higher sample frequency is that the
group delay is smaller and I can use smaller capacitors and resistors
in the filter. Eight 12-bit channels at 512Hz sampling rate produce
only 50 kbit data per second and that is easily handled by a 115kbps
link. Downsampling a signal to 128Hz in the PC not very demanding
either. My Pentium II 450MHz CPU can do this using less than 1% of
its resources.

Anyway, It's just a matter of personal taste. Just tell me what
filter type (Butterworth, Bessel...) and sampling frequency you want
and I can design a filter for that as an option.

Regards,

Andreas



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