Re: My project - status report

From: Andreas Robinson (sleeper75se_at_yahoo.se)
Date: 2002-03-02 17:43:41


Hi Joerg,

> If you have a 2-channel scope you have the option
> to add both channels while one is inverted. If you
> use the same gain for both channels you effectively
> get the difference between both probes.
> This setup eliminates much of the ground noise
> without need to have expensive FET probes ...

Ah! Clever! I'll try that. Thanks.

> > > > The RLC-filters are not nearly as
> > > > efficient as calculated for some reason...
>
> Did you include series inductances of some 10nH
> for each C of your simulation ?

Hmm, no. Only resistors for the electrolytics.

(Checking simulation) Yikes, from good to almost
useless. :-p

> For 20MHz you need 10nF ceramics (with very short
> wires) very near to the DCDC outputs.

Unfortunately is the cable is not detachable and the
supply looks very difficult to open without breaking
something (there are no screws). However I can try
shortening the cable to 5-10 cm.

I've attached a switcher-CAD schematic of a filter I
hope will work. The 10uF tantalums are there to
attenuate a 500kHz resonance peak caused by the 10uH +
10nF LC-combination. Please tell me what you think, is
it "realistic"?

The series inductances and resistances are entered
into the capacitor-models and are not visible in the
schematic.

> Treat your bypassing Cs in your layout as if they
> had 4 poles (2 input wires and 2 output wires)
> The layout traces of a bypass C should look like
> a "X" and not like a "H" to minimize trace
> inductance in series with the C.
> (each cm of trace has about 10nH)

Oops. I already knew that, yet somehow failed to
implement it (for the 2200uF capacitor anyway). :-p

> BTW: For dual power supplies it is always a good
> idea to put a reversed diode (capable of handling
> the regulator output shortcut current) from each
> regulator output to GND. Otherwise in case of a pcb
> failure with shortcut between +5V and -5V one
> regulator will win and pull a part of the attached
> circuit to reverse polarity - and destroy it.

Acknowledged...

> amplifier:
>
> You write on the schematic that the HP-coupling is
> useless due to the long time constant. That is not
> true.
> With 1meg and 1uF you get T=1 sec or fc=0.16 Hz and
> not 0.016 Hz.

Hmm, maybe I was unclear. The filter is not performing
well, because the high-gain stage (G=100) in front of
it will cause saturation of the output (after both
gain stages) for fairly low offsets (15mV). Lowering
the gain before the filter and increasing it after,
will produce better results. G=20 is the equivalent of
what you are using now and your design handles 100mV
offsets.

Regards,

Andreas

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