Re: [buildcheapeeg] patient over current protection

From: Sar Saloth (sarsaloth_at_yahoo.com)
Date: 2002-03-13 16:25:32


<snip>
Shortcuts on the PCB or failures of the 1st input stage that
>connect +5V and AGND to the EEG electrodes and thereby exceed
>the IEC601-1 maximum 10uA DC through the patient.
>
>The problem was how to protect the patient and simultaneously
>not to put too much additional resistance in series with the inputs
>(what would result in increased noise due to the noise current from the
>INA114 inputs) or add more risk by an active circuit that could fail
>itself.
>
>I am not too happy with this input protection because some failure
>conditions can occurr (see I/U diagramm in the above mentioned posting)
>that it will not resolve.
>
>What do you think ?

Until I go back and check the standards again, I won't be able to give a
more solid response but this is my unprofessional opinion..... I think a
single fault condition can include a patient energized to mains voltage -
In case your protection will not protect up to 240VAC RMS it is not worth
it (I have now reviewed this email and am not so sure of "not worth
it"). In that case, I can't remember if the current is 100uA or 10uA or
something like that, but honestly for dermal electrodes how dangerous is
5V? (the current limits differ depending on the fault status, as they do
take probability into account when creating the specifications).
The first priority is safety of course, and then meeting the
requirements. They may be some mitigating factor in the requirements that
means you don't have to worry about 5V current limiting but I have to check
what it is. There may be a standard electrode impedance of 2K or 4K or
something, but that alone won't get you low enough. I am wondering if low
voltage has something to do with it because I remember that if something
was equivalent to SELV (Safety extra low voltage) then it was considered
not to be a risk, but I don't remember if that is for electrodes or not.
A also saw somewhere else in the standards that if safety isolation barrier
was a semiconductor junction then it had to be shorted out or considered
shorted for the test. Somewhere nearby it stated that if creepage and
clearance distances were not maintained then for the purpose of that test
that specific barrier was to be shorted.
I will be able to review and give a better (although unprofessional)
opinion in about two months. The most important part is guaranteeing those
current limits with the worst case, and of course ensuring the dielectric
withstand test (4000V? or 3500V?) and the creep and clearance. That is why
redundant isolation is frequently used.
In terms not discussing specific standards, I would not be very afraid of
an electrical fault placing 5V on my skin, but electrical isolation should
never be skimped on. For anything I do, I will use redundant
isolation. For the nice optical TOSLINK that means just worrying about the
power supply, right?

Your solution to current limiting looks quite nice. It might in fact be
necessary but I have seen a number of medical devices that didn't have
it. Just because they didn't have it didn't mean they weren't supposed to
though. I was confused before when I thought it was a low leakage method
of voltage clamping for over-voltage transients, but I thought I was
looking at it backwards. Now it makes much more sense to me.

I have already taken a fair bit of your time away from your project, so my
suggestion would be to do exactly what you are doing, and when and if I
find out better details I will give you that info. I can't see myself
contributing to the hardware in other ways, considering your excellent
progress right now (thought I will be doing more part searching as soon as
I can shut up in the software side of this).

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