From: Joerg Hansmann (info_at_jhansmann.de)
Date: 2001-08-08 16:11:52
Hi Rob ,
----- Original Message -----
From: Rob Sacks <editor_at_realization.org>
To: <buildcheapeeg_at_yahoogroups.com>
Sent: Wednesday, August 08, 2001 3:21 PM
Subject: Re: [buildcheapeeg] comADC-EEG
> Hi Joerg,
>
> Okay, thanks. I think I understand now.
> I can't think of any way to make this work
> under Windows. Too bad there's no way
> to generate interrupts when the signal
> starts and stops.
That is not right - I only did not mention this feature.
You can configure the UART so
that level change on CTS generates an interrupt.
However I am not sure about interrupt latency
time in a windows 98 system.
If it is constant and / or below 1us it would be ok.
But I guess it is much more.
> I think a Windows device
> driver might be able to respond to
> interrupts fast enough to get decent resolution.
Could you evaluate if it could respond in 1us ?
> But like you say, Windows wouldn't be
> happy if we tried to poll continuously
> with interrupts disabled for up to
> 1 ms 256 times a second.
The counter loop is a small problem compared
with getting synced on the begin of the pulse.
To get rid of the last, I have redesigned the
sampling clock generation.
Now a hi-speed timer (also available under Windows ?)
can generate whatever sampling clock is desired.
( <= 512Hz should be possible )
Regards,
Joerg
This archive was generated by hypermail 2.1.4 : 2002-07-27 12:28:31 BST