From: Rob Sacks (editor_at_realization.org)
Date: 2001-08-08 16:51:25
Hi Joerg,
> However I am not sure about interrupt latency
> time in a windows 98 system.
> If it is constant and / or below 1us it would be ok.
According to Microsoft the interrupt latency under
NT in 1995 was 1.8 - 2.9 usec. I can't find any
other published results. (I've looked before for
this info.)
> > Could you evaluate if it could respond in 1us ?
It would probably be a lot of work for me because
I've never written a device driver for Windows.
> The counter loop is a small problem compared
> with getting synced on the begin of the pulse.
What if the hardware generates an interrupt
5 usec before the pulse and 5 usec before the
end of the pulse? Each time, the interrupt
handler is invoked and begins polling. It polls
until the actual event (start or end of pulse).
Then it records the system time (measured in
.8 usec units) in a buffer and goes to sleep. That
way we'd only need to disable interrupts for a
few usec. This would bring the total resolution
to 1.6 usec, wouldn't it?
> Now a hi-speed timer (also available under Windows ?)
> can generate whatever sampling clock is desired.
> ( <= 512Hz should be possible )
The timer for scheduling (invoking code) uses
intervals that are integral numbers of milliseconds:
1 ms, 2 ms, 3 ms, etc. = 1000 Hz, 500 Hz, etc.
The max resolution is 1 ms. I posted test results
yesterday showing the accuracy of it.
There's also a "counter" for measuring intervals.
On Intel CPUs the resolution is .8 usec.
Regards,
Rob
----- Original Message -----
From: "Joerg Hansmann" <info_at_jhansmann.de>
To: <buildcheapeeg_at_yahoogroups.com>
Sent: Wednesday, August 08, 2001 11:11 AM
Subject: Re: [buildcheapeeg] comADC-EEG
> Hi Rob ,
>
> ----- Original Message -----
> From: Rob Sacks <editor_at_realization.org>
> To: <buildcheapeeg_at_yahoogroups.com>
> Sent: Wednesday, August 08, 2001 3:21 PM
> Subject: Re: [buildcheapeeg] comADC-EEG
>
>
> > Hi Joerg,
> >
> > Okay, thanks. I think I understand now.
> > I can't think of any way to make this work
> > under Windows. Too bad there's no way
> > to generate interrupts when the signal
> > starts and stops.
>
> That is not right - I only did not mention this feature.
>
> You can configure the UART so
> that level change on CTS generates an interrupt.
>
> However I am not sure about interrupt latency
> time in a windows 98 system.
> If it is constant and / or below 1us it would be ok.
>
> But I guess it is much more.
>
> > I think a Windows device
> > driver might be able to respond to
> > interrupts fast enough to get decent resolution.
>
> Could you evaluate if it could respond in 1us ?
>
> > But like you say, Windows wouldn't be
> > happy if we tried to poll continuously
> > with interrupts disabled for up to
> > 1 ms 256 times a second.
>
> The counter loop is a small problem compared
> with getting synced on the begin of the pulse.
> To get rid of the last, I have redesigned the
> sampling clock generation.
> Now a hi-speed timer (also available under Windows ?)
> can generate whatever sampling clock is desired.
> ( <= 512Hz should be possible )
>
>
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