From: Joerg Hansmann (info_at_jhansmann.de)
Date: 2002-03-12 22:19:02
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The mail could not be delivered. So I post the answer here.
> Hi,
>
> ----- Original Message -----
> From: Aditya Babbar <aditya_babbar_at_sourceforge.net>
> To: <info_at_jhansmann.de>
> Sent: Tuesday, March 12, 2002 11:44 AM
> Subject: Modular EEG Design
>
>
> > Hello Mr. Hansmann
> > I congratulate you over the wonderful work you are doing on
> > Modular EEG Design.(I'm a member of the buildcheapeeg
> > group.)
>
> Thanks. :-)
>
> > Coming to the point ,i'm an instrumentation engineering
> > undergraduate who wants to learn and practically develop
> > electronic circuits rather than limiting myself to block
> > diagrams given in the books.
>
> Good books are an important source of knowledge.
>
> Equally important are the selection guides, datasheets and application
> notes from the manufacturers of the circuits intended to use in the
> new design.
>
> > I would like to know what
> > pratical problems are encountered during circuit design and
> > how does a designer tries to solve them.
> > So i request you to
> > attach a text file which describes the working of the
> > modular eeg circuit and the various important circuit
> > elements put in there .
>
>
> Analog section (file: "modEEGamp1_15_std.sch"):
>
> Summary of functional blocks:
>
> * input HF rejection
> * ESD and patient overcurrent protection
> * Instrumentation amplifier with G=10 to allow +-100mV input voltage without saturation
> * driven right leg circuit (DRL) for enhanced common mode voltage rejection
> * 1st highpass to remove DC offset
> * 2nd amplifier stage with adjustable gain
> * 2nd highpass to remove offset voltage
> * virtual ground splitter
> * calibration voltage divider
>
> Most of these blocks have been discussed (partially supported with LTSPICE simulations)
> in this group and should be available in the list archives.
>
> If you have detailled questions feel free to ask on the mailing list.
>
> Perhaps the answers can be collected so that we finally get a nice
> documentation (that currently simply does not exist) of the whole design.
>
>
> Regards,
>
> Joerg
>
This archive was generated by hypermail 2.1.4 : 2002-07-27 12:28:40 BST