From: sleeper75se (sleeper75se_at_yahoo.se)
Date: 2002-06-06 19:06:00
Hi Joerg,
this was not fun reading for me, but you have pointed out the weak
spots, and I really appreciate it. Thanks.
Could you please take some time considering these fixes (schematic
not updated yet) and say what you think?
1) ESD protection / HF-blocking.
The transistors will be placed between the inamp and the HF caps.
2) Settling time, and 3) DRL
I really want the DRL to work, so I guess the input capacitors will
have to go. :-(.
Of course, the settling time then drops to 3 seconds, which is nice.
4) Input noise (1uVp-p)
The INA126 is just $2.50, so one can't really complain. Is it too
noisy you think? (Not sure if you are being ironic here...) Remember
that you get less noise when you look at narrower frequency bands.
5) 4060B oscillator/counter outputs
Only 8, 32 and 512Hz are actually connected to something. I labeled
all outputs as a reminder to myself.
6) Total RTO offset - JP100 jumper
That is a remnant from previous designs (copy and paste), so I don't
expect anyone to really use that unless they have better parts. Both
the INA126 and TL064 have quite horrible offsets, so in total you get
1.85V worst case, ((250uV * 125 + 15mV) * 40) with the jumper closed.
With the jumper open, it is 0.6V max originating in the second gain
stage (TL064) (0.3V typ).
Hmm, that is not too good either...
Replacing the TL064 with an LP324 lowers the offset to max 0.16V
(0.08V typ). (LP324 datasheet:
http://www.elfa.se/pdf/73/730/07303241.pdf) Is it good enough?
Once again, thanks. I hope you have time to comment on these
suggestions.
Regards,
Andreas
This archive was generated by hypermail 2.1.4 : 2002-07-27 12:28:43 BST